4. Logical & bitwise instructions¶
4.1. Document conventions¶
Rd, Rn denote ARM registers R0-R7 except in the case of the
special instructions where R0-R15 may be used.
Rn<a-b> denotes an ARM register
whose contents must lie in range
a <= contents <= b. In the case of instructions
with two register arguments, it is permissible for them to be identical. For example
the following will zero R0 (Python
R0 ^= R0) regardless of its initial contents.
These instructions affect the condition flags except where stated.
4.2. Logical instructions¶
Rd &= Rn
Rd |= Rn
Rd ^= Rn
Rd = Rn ^ 0xffffffffi.e. Rd = 1’s complement of Rn
Rd &= ~Rnbit clear Rd using mask in Rn
Note the use of “and_” instead of “and”, because “and” is a reserved keyword in Python.
4.3. Shift and rotation instructions¶
Rd <<= Rn
Rd = (Rd & 0xffffffff) >> RnLogical shift right
Rd >>= Rnarithmetic shift right
Rd = rotate_right(Rd, Rn)Rd is rotated right Rn bits.
A rotation by (for example) three bits works as follows. If Rd initially
b31 b30..b0 after rotation it will contain
b2 b1 b0 b31 b30..b3
4.4. Special instructions¶
Condition codes are unaffected by these instructions.
Rd = count_leading_zeros(Rn)
count_leading_zeros(Rn) returns the number of binary zero bits before the first binary one bit in Rn.
Rd = bit_reverse(Rn)
bit_reverse(Rn) returns the bit-reversed contents of Rn. If Rn contains bits
b31 b30..b0 Rd will be set
b0 b1 b2..b31
Trailing zeros may be counted by performing a bit reverse prior to executing clz.